| Title | A Ring-Oscillator-Based Degradation Monitor Concept with Tamper Detection Capability |
|---|---|
| ID_Doc | 8516 |
| Authors | Diaz-Fortuny, J; Saraza-Canflanca, P; Bury, E; Vandemaele, M; Kaczer, B; Degraeve, R |
| Title | A Ring-Oscillator-Based Degradation Monitor Concept with Tamper Detection Capability |
| Year | 2022 |
| Published | |
| Abstract | Refurbished chips (i.e., chips re-used legally in circular economy) and counterfeited chips (i.e., used chips fraudulently sold as new) are a growing concern for the industry because of their poor reliability. In this context, various solutions for the detection of such chips have been presented in the literature, several of which make use of performance degradation detection circuits. In this work, we propose a new concept for a degradation monitor, which can (1) obtain the age of the chip and (2) detect if the chip has been tampered through high-temperature annealing. To demonstrate the principles of this concept, we designed a novel and versatile array of addressable ring-oscillators (ROs), a type of circuit that has been widely proposed to detect fraudulently recycled chips. The array IC was manufactured in a 28 nm CMOS technology and utilized as a reliability test vehicle. Using this chip, we performed an extensive study of degradation phenomena that affect the ROs, as well as the recovery that they undergo after the stress application has ceased. Finally, we examined the impact that temperature annealing has on the recovery of circuit degradation, thus fraudulently concealing prior usage of the chip. |
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